Formally Verified Autoresearch for Analyzing the Expressivity of Multi-Head Attention

arXiv:2610.25341 · cs.CC, cs.AI, cs.LG · Submitted 2026-10-18 · Read on arXiv

cs.CC, cs.AI, cs.LG

Submitted: 2026-10-18

Updated: 2026-10-18

Comments: 25 pages, 1 figure. Oral presentation at the AutoMLR Workshop at NeurIPS 2026

License: http://creativecommons.org/licenses/by/4.0/

The gist: Multi-head attention is a central component of the transformer architecture, yet how its expressivity depends on the number of heads remains poorly understood.

Abstract

Multi-head attention is a central component of the transformer architecture, yet how its expressivity depends on the number of heads remains poorly understood. We study a one-layer, attention-only transformer with additive positional embeddings and define the head complexity H(f) of a Boolean function f as the minimum number of attention heads required to represent it. We derive an exact linear-fractional normal form for head complexity, prove a general threshold-degree lower bound, and give an explicit ten-bit function for which this bound is strict. For symmetric Boolean functions, we independently show that head complexity equals the number of times the function changes value between consecutive Hamming-weight levels, even when positional embeddings are allowed. This agrees with the concurrent characterization of Hsu and Xu (arXiv:2608.04243) in a model without positional embeddings. The symmetric lower bound combines our general threshold-degree bound with the classical result of Aspnes et al. (1994). These results were discovered and formalized by a frontier model through conjecture generation, theorem proving, and machine verification, while human researchers asked the high-level questions and reviewed the generated theorems. We make the Lean formalization and research traces publicly available to support agent-assisted theorem proving and formal verification in mechanistic interpretability. This work provides a proof of concept for using the capabilities of frontier models, grounded by formal verification, to develop an understanding of transformer architectures.

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