ITP-STDP: A Hardware-Efficient Intrinsic-Timing Power-of-Two Synaptic Learning Engine for On-Chip SNNs

arXiv:2606.06159 · cs.AR, cs.AI, cs.NE · Submitted 2026-06-04 · Read on arXiv

cs.AR, cs.AI, cs.NE

Submitted: 2026-06-04

Updated: 2026-08-31

Terminology

• Accuracy — 6× in this paper · explained in 1 episode
• Alignment — 4× in this paper · explained in 1 episode
• Core — 4× in this paper · explained in 2 episodes
• Spiking Neural Networks (SNNs) — 4× in this paper · explained in 3 episodes
• Quantization — 3× in this paper · explained in 12 episodes
• Energy Efficiency — 2× in this paper · explained in 3 episodes
• Long-Term Potentiation — 2× in this paper
• Computational overhead — 1× in this paper · explained in 2 episodes
• Consistency — 1× in this paper · explained in 3 episodes
• Long-Term Depression — 1× in this paper
• Regularization — 1× in this paper · explained in 3 episodes
• Trace — 1× in this paper · explained in 2 episodes

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