Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid
summary
The gist
High-performance quantum low-density parity-check codes promise substantial reductions in the overhead of fault-tolerant quantum computation, but most constructions require long-range connectivity or
In short
The paper introduces quantum low-density parity-check codes that solve overhead issues in fault-tolerant quantum computation by using only nearest-neighbor gates on a square grid. It dynamically generates check connectivity via 'nearest-neighbour iSWAP walks,' avoiding complex long-range hardware requirements and achieving high performance comparable to surface codes.
Key concepts
- Directional Words
- These are ordered strings of lattice steps that geometrically trace a connected path on a square grid. Algebraically, this string defines the support structure of a stabilizer. Pairing these words on primal and dual lattices creates the full CSS stabilizer structure.
- Nearest-Neighbour iSWAP Walks
- Instead of requiring long-range connections, these walks use only local nearest-neighbor gates (iSWAPs) to define both where the stabilizers are located and how they are measured. This dynamic approach eliminates the need for a complex, long-range hardware graph.
- Code Efficiency Ratio
- This metric compares the performance of a new code construction against existing ones, like surface codes. The paper shows that certain tile codes achieve an efficiency ratio nearly ten times larger than rotated surface-code patches at the same code level.
- Routing Overhead Scaling
- The number of qubits needed for routing (moving check data) scales relatively slowly with the code size, specifically $O(\sqrt{n})$ or $O(d)$. This demonstrates that even with local constraints, the overhead remains manageable and can be optimized using techniques like 'route window shortening'.
Terminology used across episodes
This episode discusses
- Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid · Paper Radio
- Mind the gaps: The fraught road to quantum advantage
- The Pinnacle Architecture: Reducing the cost of breaking RSA-2048 to 100 000 physical qubits using quantum LDPC codes
- Shor's algorithm is possible with as few as 10,000 reconfigurable atomic qubits
- Towards Ultra-High-Rate Quantum Error Correction with Reconfigurable Atom Arrays
- Architecting Early Fault Tolerant Neutral Atoms Systems with Quantum Advantage
- Concatenating Algebraic Codes over High-Rate Quantum LDPC Codes
- Computing with many encoded logical qubits beyond break-even
- A Denser Planar Surface Code
- Directional Codes: a new family of quantum LDPC codes on hexagonal- and square-grid connectivity hardware
- Parametrically Driven iSWAP Gate Using a Capacitively Shunted Double-Transmon Coupler at the Zero-Flux Sweet Spot
- High-fidelity iSWAP gate with Double Transmon Coupler
- Barbell Codes: qLDPC Codes for Superconducting Quantum Hardware
- Structural Analysis of Directional qLDPC Codes
- Low Depth Color Code Circuits with CXSWAP gate
- Planar fault-tolerant logical measurements with low qubit overhead
- Logical Operators and Derived Automorphisms of Tile Codes · Paper Radio
- Logical Operators and Fold-Transversal Gates of Bivariate Bicycle Codes
- Clifford-deformed zero-rate LDPC codes with 50% biased noise thresholds
- Extractors: QLDPC Architectures for Efficient Pauli-Based Computation
- Automorphism Ensemble Decoding of Quantum LDPC Codes
The paper
Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid · Read on arXiv
1Dahlem Center for Complex Quantum Systems at Freie Universitat Berlin · Quantum Software Lab at The University of Edinburgh · IQM Quantum Computers at IQM Quantum Computers in Munich · Institute of Mathematics at Johannes Gutenberg-Universitat Mainz, Helmholtz-Zentrum Berlin fur Materialien und Energie
High-performance quantum low-density parity-check codes promise substantial reductions in the overhead of fault-tolerant quantum computation, but most constructions require long-range connectivity or qubit shuttling, both of which are difficult to realise in superconducting architectures. Here we introduce a family of quantum low-density parity-check codes that, for the first time, combines planar open-boundary layouts, finite-size advantages over surface codes, and syndrome extraction using only nearest-neighbour gates on a planar grid of qubits with either square or hexagonal connectivity. The resulting circuits achieve optimal constant-depth stabiliser measurement, independent of code size, and naturally remove leakage from the system by exchanging the roles of check and data qubits at each syndrome extraction round. We find finite-size instances such as a [[323,14,15]] code, whose code-efficiency ratio is nearly an order of magnitude larger than that of rotated surface-code patches. At around 40 circuit qubits per logical qubit, the best directional tile-code layouts reduce the per-logical per-round logical error rate by a factor of 100 relative to rotated surface-code memories. These results show that the advantages of quantum low-density parity-check codes can survive compilation into strictly planar nearest-neighbour circuits, bringing low-overhead fault-tolerant memories closer to near-term hardware.
Transcript
Introduction to the show: ident: Quantum Radio. Generated commentary on the latest quantum physics and condensed matter papers.
Kai: Today's paper: "Nearest-neighbour gates are all you need".
Mira: High-performance quantum low-density parity-check codes promise substantial reductions in the overhead of fault-tolerant quantum computation, but most constructions require long-range connectivity or qubit shuttling,
Kai: First, who's behind it and why it matters.
Paper summary: Mira: Thinking about the title, "Nearest-neighbour gates are all you need: High-rate quantum low-density parity-check codes on a planar grid," it really captures the essence of the paper's contribution, which is simplifying the hardware requirements for these kinds of codes.
Kai: Right, and when we look at what this means in simpler terms, it’s that we’ve found a way to implement powerful quantum error correction schemes using only local gates on a grid structure without demanding complex long-range physical connections or moving qubits around constantly.
Lev: I see the implication for running these codes: if the syndrome extraction dynamics are inherently local and governed by nearest-neighbour walks, then we bypass the need for complicated global control lines that usually bottleneck scaling up error correction systems on current hardware.
Mira: The authors’ work essentially shows how to design a low-density parity-check code structure where the physical implementation constraints—the planar grid and nearest-neighbour gates—naturally align with the required syndrome measurement process, which is a very neat conceptual alignment.
Kai: So, for me, the main point is that they've provided a constructive method: directional words define both the stabilizer structure and how you measure it simultaneously using local operations on a square grid, which cuts down on complexity substantially.
Lev: That constructive aspect is what makes it relevant for error correction researchers because it gives us a tangible framework to start designing actual circuits instead of just theoretical bounds; we can see how the complexity scales based on the distance d.
Mira: And from a theoretical perspective, the finding that these directional tile codes outperform rotated surface-code patches in code efficiency suggests that there's structural beauty in how these specific lattice constructions interact with local connectivity.
Kai: I think the real impact is showing that we don't have to sacrifice locality for performance when designing fault-tolerant quantum computation; this moves us closer to realizing practical, scalable hardware on existing platforms.
Conclusion: Kai: So, to wrap up this discussion on "Nearest-neighbour gates are all you need," we've seen how these codes work without needing those long-range connections we usually fear in superconducting circuits.
Mira: I think the paper really nails it by showing that their construction of check-data connectivity is dynamic, using nearest-neighbour iSWAP walks to handle both the stabilizer supports and the measurements on a square grid.
Lev: From an error correction standpoint, this is significant because it means we don't have to worry about complex routing overhead that often kills our scaling efforts on real hardware.
Kai: Exactly, and when you look at the results, they show these directional tile codes can actually beat rotated surface-code patches in terms of code efficiency when you push them to realistic error rates.
Mira: That efficiency gain is what's really interesting; it suggests that the structural arrangement of these specific planar layouts offers a better trade-off between code size and resource usage than we previously thought.
Lev: I mean, if we can achieve those error rate reductions by just using local gates, then the path to building fault-tolerant systems on current architectures looks much more viable.
Kai: It really points toward a design philosophy where the hardware constraints aren't an obstacle but are actually being leveraged to create a more efficient code structure.
Mira: The authors' focus on directional words defining both the stabilizer structure and the measurement walk is a very elegant way to simplify that complex mapping between theory and physical implementation.
Lev: It gives us a concrete mechanism for how to handle syndrome extraction that doesn't require any kind of qubit shuttling, which is a massive win for experimentalists.
Kai: So, this paper suggests we can design codes that are naturally compatible with the nearest-neighbour constraints of our current hardware while still achieving high performance.
Mira: And it leaves us wondering how far this idea extends beyond the square grid structure they used in their construction to other types of physical layouts.
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