STELLA: A 16nm Spatio-Temporal Elastic Low-Latency CGRA for Multi-Stage Pipelined Applications

arXiv:2609.39703 · eess.SY, cs.AR, cs.SY · Submitted 2026-09-30 · Read on arXiv

eess.SY, cs.AR, cs.SY

Submitted: 2026-09-30

Updated: 2026-09-30

Terminology

• Core — 17× in this paper · explained in 2 episodes
• Aggregation — 2× in this paper · explained in 1 episode
• Control State Register — 2× in this paper
• Decode — 2× in this paper · explained in 2 episodes
• Adaptability — 1× in this paper · explained in 1 episode
• Adaptation — 1× in this paper · explained in 1 episode
• Benchmarking — 1× in this paper · explained in 3 episodes
• CU Dout Fast Forwarding — 1× in this paper
• Energy Efficiency — 1× in this paper · explained in 3 episodes
• Initiation Interval — 1× in this paper
• SIMD Compute Units — 1× in this paper
• Unified Framework — 1× in this paper · explained in 5 episodes

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