ChipMEM: Verification-Grounded Memory for EDA Agents
cs.LG, cs.CL
Submitted: 2026-09-22
Updated: 2026-09-22
Code: https://github.com/aalrabah/ChipMEM
Terminology
Sources
- RTLScout: Joint Agentic Code and Synthesis Optimization for Efficient Digital Circuits
- SWE-Bench Pro: Can AI Agents Solve Long-Horizon Software Engineering Tasks?
- Trace2Skill: Verifier-Guided Skill Evolution for Long-Context EDA Agents
- Dr. RTL: Autonomous Agentic RTL Optimization through Tool-Grounded Self-Improvement
- EvolVE: Evolutionary Search for LLM-based Verilog Generation and Optimization
- A New Benchmark for the Appropriate Evaluation of RTL Code Optimization
- ReasoningBank: Scaling Agent Self-Evolving with Reasoning Memory
- Comprehensive Verilog Design Problems: A Next-Generation Benchmark Dataset for Evaluating Large Language Models and Agents on RTL Design and Verification
- POET: Power-Oriented Evolutionary Tuning for LLM-Based RTL PPA Optimization
- EARL: Entropy-Aware RL Alignment of LLMs for Reliable RTL Code Generation
- Voyager: An Open-Ended Embodied Agent with Large Language Models
- VeriAgent: A Tool-Integrated Multi-Agent System with Evolving Memory for PPA-Aware RTL Code Generation
- SkillOpt: Executive Strategy for Self-Evolving Agent Skills
- Agentic Hardware Design as Repository-Level Code Evolution
- Alpha-RTL: Test-Time Training for RTL Hardware Optimization
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