How Far Can You Do Nothing On a Quantum Computer?

arXiv:2608.21904 · quant-ph, cs.DC, cs.ET · Submitted 2026-08-22 · Read on arXiv

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Introduction to the show: ident: Quantum Radio. Generated commentary on the latest quantum physics and condensed matter papers.

Kai: I'm Kai, and with me are Mira and Lev, guest researcher.

Mira: Today's paper: "How Far Can You Do Nothing On a Quantum Computer?".

Kai: We present a route-resolved comparative assessment of Rigetti’s Cepheus-1-108Q and IBM Heron-r2 processors using the established do-nothing state-transfer protocol.

Mira: First, who's behind it and why it matters.

Paper summary: Kai: So, Mira, we're looking at this paper titled "How Far Can You Do Nothing On a Quantum Computer?" It sets up a really specific test using the do-nothing protocol to see how far quantum information can travel across different quantum hardware. The core idea seems to be isolating the fundamental spatial limits of these systems by measuring how noise affects state transfer over physical distances.

Mira: That sounds like a solid starting point, Kai, because what I'm seeing in the abstract is that they aren't proposing a new protocol; they are using this established do-nothing task as a high-resolution spatial probe to characterize the hardware’s fundamental spatial capabilities. The crucial claim seems to be that by intentionally running this almost empty task, they can isolate the cumulative degrading effects of noise like T1 relaxation and T2 dephasing before any useful control operation even happens six seven <ref:2608.21904#pg1>.

Lev: From an error correction standpoint, I wonder how practical this is for real hardware because we're talking about these fundamental state transfer limitations. If the protocol itself is deterministic and low-complexity, it suggests a way to benchmark the physical connectivity without needing full fault-tolerant circuits right away. However, running this on actual physical qubits introduces noise that we can't perfectly model just with these simple relaxation times.

Kai: Exactly, Lev, and what makes this paper interesting is that they aren't just looking at one thing; they are doing a comparative assessment between Rigetti’s Cepheus-one-108Q and IBM’s Heron-r2 processors using this same do-nothing state transfer protocol <ref:2608.21904#pg0,Rigetti’s Cepheus-1-108Q and IBM>. They report on two complementary quantities for each initial qubit: the largest tested radius within which every evaluated shortest route satisfies the operational success rule, and the longest successful route identified within the evaluated route family.

Mira: The comparison between Rigetti’s QPU and IBM’s QPU is key because it seems to reveal a sharp distinction between uniform spatial reliability and best-route performance. They use metrics like Maximal Isotropic Length, or riso, to see how far information can travel uniformly in any direction before directional-dependent noise dictates path viability <ref:2608.21904#pg1>. This gives us a way to quantify the spatial constraints imposed by the physical layout of the qubits themselves.

Lev: That distinction between isotropic regions and best-route paths is really something we need to consider when thinking about scaling error correction codes. If you can only guarantee success over a small isotropic radius, you’re limited in how much you can rely on local connectivity for long-distance operations <ref:2608.21904#pg1>.

Paper summary: Kai: Right, and then they also report the Maximal Successful Path, or rmax, which identifies the longest successful route identified within that route family when optimal routing is leveraged. This shows us how much resilience we can get if we are smart about how we move that state across the system.

Mira: And what I find compelling is their finding regarding Rigetti’s QPU, where they found some of the shortest paths of length eight routing from qubit one hundred seven to qubits sixty-seven and seventy-five successfully maintained above-threshold fidelities for swap distances eight and six, respectively <ref:2608.21904#pg3>. This suggests that the modular grid structure on that architecture allows circuit compilers to actively select exceptional corridors and bypass localized noise, which is a practical advantage.

Lev: If those specific long-range paths are successful, it means there’s some degree of structural coherence in how those qubits are physically arranged that we need to investigate further for error correction requirements <ref:2608.21904#pg3>. But I also have to push back a bit: this is about specific initial qubits; if you try to run this on an arbitrary set of qubits, the success rate might drop off much faster than what they report here.

Kai: That's a fair point about the specificity of those examples, Lev, but the paper is designed to be a high-resolution probe for these architectures specifically. On IBM’s QPU, they saw that Fez qubit one hundred forty attained a larger empirical isotropic radius of ten and a longer identified successful route of twenty-seven compared to Rigetti’s best case <ref:2608.21904#pg4>.

Mira: That comparison is telling because the IBM heavy-hex topology imposed strict uniform routing boundaries, as shown by the Maximal Isotropic Sub-star in Figure eight for qubit one hundred forty which had a radius of ten <ref:2608.21904#pg4>. So, while one specific route was very long at twenty-seven, the overall spatial reliability in any direction was more constrained than what Rigetti demonstrated in that specific context.

Lev: That contrast between a single very long path and a restricted uniform region really helps frame the trade-off we see in physical layouts. It shows that hardware design choices dictate whether you prioritize broad, reliable connectivity or the possibility of extremely long, but less certain, connections <ref:2608.21904#pg4>.

Kai: So, to summarize what this paper on "How Far Can You Do Nothing On a Quantum Computer?" shows us is that the physical execution of this simple do-nothing task is far from trivial because it encapsulates the cumulative noise effects <ref:2608.21904#pg2>. They use these metrics, riso and rmax, to precisely map out these fundamental spatial capabilities for different quantum platforms.

Paper summary: Mira: The implication here for condensed matter theory is that the physical realization of quantum hardware is intrinsically tied to its topology; the way qubits are laid out dictates whether they support robust uniform connectivity or just a few very specific, long-range corridors <ref:2608.21904#pg4>. It suggests that noise isn't just an external factor you add; it's deeply embedded in the spatial geometry of the system itself.

Lev: For error correction research, this work suggests we need to look beyond just theoretical connectivity graphs and start incorporating the actual physical noise profile dictated by these spatial metrics when designing layouts for fault tolerance <ref:2608.21904#pg3>. We need to know where those guaranteed routes are before we can even start building the logical qubits on top of them.

Kai: Looking at the broader impact, this paper provides an empirical benchmark that helps researchers decide which hardware architectures are best suited for certain types of state transfer algorithms, whether they prioritize maximal uniform reach or maximum single-path endurance <ref:2608.21904#pg1>. It moves the discussion from abstract connectivity graphs to measurable physical constraints on real quantum devices.

Mira: I think the broader impact is that it grounds our theoretical models of hardware performance in concrete, observable spatial metrics derived from actual physical architectures <ref:2608.21904#pg4>. If these results hold up across different vendors, it gives us a much better understanding of how noise scales with physical separation in quantum systems.

Lev: I think the main implication for the future is that we need to develop error correction strategies that are topology-aware, meaning they account for these spatial constraints rather than assuming perfect connectivity everywhere <ref:2608.21904#pg3>. We have to design protocols that respect the hardware’s inherent limitations, not just the idealized model.

Kai: So, in conclusion, this paper "How Far Can You Do Nothing On a Quantum Computer?" uses the do-nothing protocol as a high-resolution spatial probe to compare Rigetti’s Cepheus-one-108Q and IBM’s Heron-r2 processors by measuring uniform reliability versus best-route performance <ref:2608.21904#pg1>. It shows how physical layout directly constrains the fundamental way quantum information can move across the system.

Mira: Exactly, it's an empirical study on spatial noise profiles rather than a new protocol development <ref:2608.21904#pg2>. The authors are showing us that even a simple task reveals deep structural differences in the physical qubits themselves <ref:2608.21904#pg4>.

Lev: It really pushes error correction researchers to consider the actual physical connectivity constraints when planning their systems, because these spatial limitations are not negligible for running any extended computation <ref:2608.21904#pg3>. We have to work with what the hardware allows us to do reliably.

Paper summary: Kai: That's the core of it, Lev—it’s about moving from theoretical assumptions about connectivity to understanding the measurable physical reality of how noise affects state transfer across different quantum chips <ref:2608.21904#pg1>. It gives us a tangible way to judge hardware capabilities.

Mira: And the implication for condensed matter theory is that it shows how environmental coupling and crosstalk are spatially distributed, which we can then use to build better models of how these systems degrade over time <ref:2608.21904#pg2>. It connects the abstract physics to the actual physical arrangement of components.

Lev: For future work, I see a need to extend this protocol testing beyond just two architectures and maybe look at even more complex routing families to see if we can find more universal principles governing these spatial limits <ref:2608.21904#pg1>. It’s about finding the underlying rules of physical constraints.

Kai: Right, so what we're seeing here is a very concrete comparison between two major hardware players using a simple test to map out where their strengths and weaknesses lie in terms of spatial reliability and route endurance <ref:2608.21904#pg3>. It’s about what can actually be built and measured on these systems.

Mira: That's right, this paper is a valuable tool for anyone trying to understand the physical limits of quantum computation by using established protocols as a way to probe hardware structure <ref:2608.21904#pg2>. It provides necessary context for theoretical predictions about noise scaling in physical systems <ref:2608.21904#pg4>.

Lev: I think the paper’s main contribution is providing this rigorous, protocol-based benchmarking framework that lets us quantify these spatial constraints precisely, which is something we can actually use to design more resilient error correction schemes <ref:2608.21904#pg1>. It gives us a concrete yardstick for assessing hardware quality beyond just gate fidelity metrics.

Kai: So, the big picture here is that understanding how far you can reliably do nothing on a quantum computer requires looking at the interplay between physical layout, noise characteristics, and routing choices <ref:2608.21904#pg3>. It’s a very practical look at what these systems can actually achieve in terms of spatial reach.

Mira: And the title itself really captures that idea—it’s not just about computation; it’s about how much quantumness survives the journey from one physical location to another <ref:2608.21904#pg4>. It grounds the entire discussion in a measurable physical reality.

Lev: We need to keep pushing this kind of experimental probing, because until we have these concrete spatial benchmarks, our theoretical models for fault tolerance will remain largely speculative about hardware implementation <ref:2608.21904#pg3>.

Kai: Indeed, it’s a very detailed look at the physical constraints imposed by the architecture itself when you're just moving a quantum state around <ref:2608.21904#pg3>. It’s about what we can actually build and measure on these machines.

Conclusion: Kai: So, this paper really drills down into how far quantum information can travel before it starts getting ruined by noise on different hardware architectures <ref:2608.21904#pg3>.

Mira: I think the title itself is pretty apt because it's not about performing a complex calculation; it's about observing the fundamental limits of physical connectivity and how those limits are shaped by the hardware's layout <ref:2608.21904#pg4>.

Lev: From my side, I see this as a crucial benchmark because if we can’t reliably move states over certain distances, then designing any kind of error correction code becomes incredibly difficult because we don't even know the reliable physical boundaries to work within <ref:2608.21904#pg3>.

Kai: Exactly, and I wonder what this means for the actual chips we're cooling down today?

Mira: It suggests that just having more qubits isn't automatically good if their physical arrangement doesn't support uniform travel between them <ref:2608.21904#pg4>.

Lev: If you can’t guarantee reliable routes over a certain distance, then the overhead of implementing logical qubits becomes a massive question for practical error correction strategies <ref:2608.21904#pg3>.

Kai: So, we're looking at how physical geometry directly dictates the limits of state transfer fidelity across different quantum platforms.

Mira: That’s right, and it moves the discussion from just abstract connectivity maps to understanding the actual spatial noise profile embedded in each machine <ref:2608.21904#pg2>.

Lev: It really puts a lot of pressure on us in error correction research to make sure our layouts are topology-aware rather than just assuming perfect connections everywhere <ref:2608.21904#pg3>.

Kai: This empirical data is going to be super helpful for anyone trying to decide which hardware platform is best suited for certain types of state transfer algorithms <ref:2608.21904#pg1>.

Mira: It grounds our theoretical predictions about noise scaling in real, measurable physical constraints from actual quantum devices <ref:2608.21904#pg4>.

Lev: We need to keep pushing these kinds of experiments because until we have these concrete spatial benchmarks, our models for fault tolerance will stay pretty speculative about what's actually possible on hardware <ref:2608.21904#pg3>.

Department of Computer Science, Technion University · The Helen Diller Quantum Center · Department of Computer Science, MIGAL – Galilee Research Institute/Tel-Hai University

quant-ph, cs.DC, cs.ET

Submitted: 2026-08-22

Updated: 2026-10-05

Comments: 57 pages, including supplementary material. Revised figures and expanded supplementary maps; clarified the return-score interpretation and methodological limitations

License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/

Importance score: 81/100

The gist: We present a route-resolved comparative assessment of Rigetti’s Cepheus-1-108Q and IBM Heron-r2 processors using the established do-nothing state-transfer protocol.

Key concepts

Do-Nothing Protocol: This is a benchmark test where a quantum state is prepared, moved between qubits using SWAP gates (routing), and returned to the start. Success means the fidelity stays above a classical limit threshold of 2/3, proving the hardware can reliably move information across physical distances.
Maximal Isotropic Length (riso): This measures how far quantum information can travel uniformly in any direction from a starting qubit. It defines a reliable 'sub-star' region where every possible pair of qubits within that distance can successfully perform the state transfer task without directional noise interference.
Maximal Successful Path (rmax): This metric identifies the longest single, highly coherent route between two specific qubits that still meets the success criteria. It shows how far a hardware can go if it can find one exceptional corridor, even if other paths are noisy.

Terminology

Fidelity — 54× in this paper · explained in 2 episodes
Benchmarking — 22× in this paper · explained in 3 episodes
Benchmark — 20× in this paper · explained in 2 episodes
Calibration — 7× in this paper · explained in 7 episodes
Physical Constraints — 5× in this paper · explained in 7 episodes
Core — 4× in this paper · explained in 2 episodes
Entanglement — 3× in this paper · explained in 4 episodes
Ancilla Qubits — 2× in this paper · explained in 1 episode
Ancillary Qubits — 1× in this paper · explained in 1 episode
Quantum Circuits — 1× in this paper · explained in 2 episodes
Selection Bias — 1× in this paper · explained in 4 episodes

Summary

We present a route-resolved comparative assessment of Rigetti’s Cepheus-1-108Q and IBM Heron-r2 processors using the established do-nothing state-transfer protocol. The gist: The results reveal a sharp distinction between uniform spatial reliability and best-route performance. This work serves as an empirical probe to characterize the fundamental spatial capabilities of quantum hardware by isolating the cumulative degrading effects of noise during state transfer.

The Do-Nothing Protocol and Mathematical Framework

This protocol is employed as a baseline state-transfer benchmark, where a quantum state is prepared, routed across physical qubits using SWAP gates, and measured for fidelity against the classical limit. The process involves:

Initializing the work qubit in the state 0⟩ and applying a random unitary operation Urand to produce ψ⟩ = Urand 0⟩.
Subjecting this state to a sequence of L swap gates that moves the work state to another qubit in the QPU.
Applying the inverse unitary U†rand to return it to the initial qubit, concluding with a measurement of fidelity F = ⟨0 ρ′ 0⟩.

The operational criterion for success is defined by exceeding a classical limit threshold: "if a specific linear sub-set of qubits (a string of connected qubits) can perform the do-nothing protocol from edge to edge while exceeding the fidelity threshold, we count this sub-set as a successful sub-set for the state transfer task." The classical limit fidelity threshold is set at F ≤ 2/3.

Experimental Design and Metrics

The experimental design focused on systematically mapping spatial capabilities across different QPUs by selecting initial qubits strategically to capture potential performance variances. For Rigetti, four representative qubits were chosen: two located centrally within the QPU and two at opposite peripheral corners. For IBM, eight initial qubits were selected: four central qubits and four at the corners.

The study yields two distinct primary metrics to answer different questions about spatial capabilities:

Maximal Isotropic Length (riso): This metric defines a strict isotropic reliable region around an initial qubit q0, where "for every two qubits q0 and qt, let d(q0, qt) denote the swap distance between them and P(q0, qt) be the set of all evaluated shortest paths connecting them. Then for each initial qubit q0, the Maximal Isotropic sub-star radius riso is defined as: riso = max[r ∈ N ∀qt s.t. d(q0, qt) ≤ r, ∀p ∈ P(q0, qt), p is successful]. This answers how far quantum information can travel uniformly in any direction before directional-dependent noise dictates path viability."
Maximal Successful Path (rmax): Distinct from the isotropic region, this metric identifies the existence of exceptionally long, highly coherent individual routes: rmax = max[r ∈ N ∃qt s.t. r = d(q0, qt) and ∃p ∈ P(q0, qt), p is successful]. This answers how far the hardware can hold the classical limit success criteria when optimal routing is leveraged.

Results of Rigetti’s QPU

The evaluation of the Cepheus-1-108Q architecture revealed a nuanced spatial noise profile. While short-range performance was restricted, specific long-range paths demonstrated resilience. For initial qubits 67 and 107, the results showed that some of the shortest paths of length eight routing from qubit 107 to qubits 67 and 75 successfully maintained above-threshold fidelities for swap distances eight and six, respectively. This highlights a practical advantage: the modular grid provides the necessary flexibility for circuit compilers to actively select exceptional corridors and bypass localized noise, optimizing long-range state transfer.

Results of IBM’s QPU

The IBM results demonstrated strong isotropic performance for certain qubits. For example, Fez qubit 140 attained a larger empirical isotropic radius (10) and a longer identified successful route (27) compared to the Rigetti best case. However, the heavy-hex topology imposed strict uniform routing boundaries, as shown by the Maximal Isotropic Sub-star in Figure 8 for qubit 140, which had a radius of ten. The analysis also showed that while average fidelity dropped below the classical limit at distances greater than L = 22 for qubit 140, a single trajectory originating from it successfully maintained above-threshold fidelity over a maximum swap distance of 27.

Comparison and Conclusion

The comparison between the two architectures revealed distinct trade-offs. The Rigetti Cepheus architecture offered much more routing flexibility than the evaluated IBM QPUs, leading to highly path-dependent performance. In contrast, the IBM heavy-hex topology exhibited a constraint on uniform routing choices.

Improvements for AI systems

As a fastidious researcher, I have analyzed this paper, How Far Can You Do Nothing On a Quantum Computer?, which provides empirical benchmarks for spatial reliability in Noisy Intermediate-Scale Quantum (NISQ) devices using a do-nothing state-transfer protocol.

The core findings establish two distinct spatial metrics:

The maximal isotropic sub-star radius (uniform reliability across all shortest paths).
The maximal successful path length (best performance of a single, optimal route).