A Neuromodulable Current-Mode Silicon Neuron for Robust and Adaptive Neuromorphic Systems

Neuromorphic engineering makes use of mixed-signal analog and digital circuits to directly emulate the computational principles of biological brains, and this work presents a novel current-mode neuron design that supports robust neuromodulation with minimal model complexity, compatible with standard CMOS technologies.

The Gist

A fully analog mixed-feedback neuron implemented in current-mode subthreshold circuits is presented, which preserves the core dynamical structure of mixed-feedback models and introduces practical improvements to reduce power consumption and area while exhibiting fully modulable excitable behaviors.

Mixed-Feedback Neuron Model and Implementation

The design adopts a mixed-feedback approach that uses a superposition of positive and negative feedbacks across distinct timescales. All state variables, such as the neuron’s membrane potential and the positive and negative feedback terms, are represented as physical currents, which naturally supports modularity via Kirchhoff’s current law. The architecture is organized around three sharply distinct timescales (fast, slow, and ultraslow) defined by the time constants of three low-pass filters.

The model utilizes two building blocks:

1. First-order current-mode low-pass filters: Described by the transfer function Iout/Iin = H(s) = G/(sτ + 1), these enable the accumulation and integration of signals over time, creating well-separated time constants for different feedback pathways.

2. Static sigmoidal functions: Represented as Iout = S(Iin; IG), these serve as a minimal model of neural ionic currents with gated and bounded conductances, introducing thresholding and saturation to create rich and tunable neuronal responses.

Dynamical Structure and Neuromodulation

The internal dynamics are organized around three sharply distinct timescales (fast, slow, and ultraslow). The fast low-pass filter models the passive membrane dynamics of the neuron. The two other low-pass filters define the slow and ultraslow current-mode state variables. Specifically:

(Fast timescale)

The fast positive feedback mimics rapid activation of sodium channels responsible for spike initiation.

(Slow timescale)

The slow positive feedback simulates low-threshold calcium currents that support bursting or regenerative depolarization.

(Ultraslow timescale)

The slow and ultraslow negative feedbacks capture delayed-rectifier and calcium-activated potassium currents responsible for spike repolarization, spike-frequency adaptation, and burst termination.

Neuromodulation is achieved by modulating the gain parameters of these sigmoids. The positive feedback inactivation mechanism promotes shorter and more power-efficient spikes by attenuating positive feedback right after a spike is generated, effectively shortening spike duration. The effective gains are modulated as:

(4a)

IGf(t) = IGf,0 − Is(t), (4a)

(4b)

IGs(t) = IGs,0 − Iu(t). (4b)

Circuit Implementation and Tuning

The circuit is implemented exclusively with current-mode subthreshold Complementary Metal-Oxide-Semiconductor (CMOS) circuits. The implementation uses:

1. Differential-pair integrator (DPI) circuits to realize the first-order current-mode low-pass filters, where capacitor sizes are scaled by a factor of 4 between timescales to achieve the desired separation.

2. Custom current-mode subthreshold circuits for the sigmoidal blocks, which are tunable via three bias voltages: Vthr (sets input threshold), Vlin (controls the size of the input current range), and VG (sets maximum output current).

The circuit achieves modularity by using these two types of analog blocks, controlled entirely through 12 bias currents. The use of subthreshold operation ensures ultra-low-power operation, and the design is invariant under uniform scaling of all bias currents in the subthreshold regime, preserving qualitative dynamical behavior.

Experimental Validation and Robustness

The prototype was fabricated on an 180 nm CMOS process. Experimental results validated the model's predictions, showing consistent spiking and bursting dynamics across various operating conditions.

(3.1 Measured Dynamics)

The neuron exhibits a consistent increase in firing activity with an increasing exogenous input current in both tonic spiking and bursting regimes, with bursts eventually overlapping to transition from bursting to fast spiking. Neuromodulation is demonstrated by varying the slow positive feedback gain (IGs), which smoothly transitions the neuron from a tonic spiking regime to a tonic bursting regime.

(3.2 Statistical Variability and Mismatch)

Monte Carlo mismatch simulations revealed a clear tradeoff: ultra-low current operation maximizes energy efficiency but increases sensitivity to device variability. Uniform current scaling by 1000× into the nanoampere range drastically improves reliability to mismatch, with yield improving to 100% in both spiking and bursting cases.

**(3.

Based on the provided scientific paper, here are specific improvements that could be made to current AI systems by integrating these neuromodulable current-mode silicon neuron designs:

1. The core improvement is the development of a new class of hardware-based AI accelerators capable of emulating biologically realistic, context-aware neural dynamics.

2. This improved system can perform the following specific tasks:

ference

3. Enable highly robust and adaptive decision-making in edge computing and robotics by leveraging neuromodulation to switch between distinct operational modes (e.g., from linear rate-based processing to nonlinear wake-up call responses).

4. Facilitate the creation of ultra-low-power, massively parallel AI systems for resource-constrained devices by utilizing subthreshold current-mode CMOS circuits, achieving energy efficiencies in the range of 40 to 200 pJ/spike.

5. Support complex behavioral switching and context-dependent information processing (e.g., switching between different task modes or sensory filtering regimes) without requiring structural rewiring of the hardware, directly mimicking biological mechanisms like those found in central pattern generators (CPGs).

6. Create novel learning architectures for artificial spiking neural networks where bursting dynamics are utilized to enhance performance in learning tasks, allowing the AI to capture richer temporal patterns than standard integrate-and-fire models.

7. Improve the robustness of AI systems against device imperfections (mismatch) by utilizing current-scale invariance properties and scaling bias currents into the nanoampere range, ensuring reliable frequency reproducibility across large arrays of neurons.

8. Enable the design of highly energy-efficient neuromorphic hardware that can be integrated with event-based communication schemes like Address Event Representation (AER), facilitating large-scale, sparse network communication while maintaining low power consumption.

9. Allow for the implementation of complex, non-linear functional units directly in analog or mixed-signal circuits using current mirrors and subthreshold sigmoids, simplifying the overall circuit design and layout for neuromorphic systems.

Neuromorphic engineering makes use of mixed-signal analog and digital circuits to directly emulate the computational principles of biological brains. Such electronic systems offer a high degree of adaptability, robustness, and energy efficiency across a wide range of tasks, from edge computing to robotics. Within this context, we investigate a key feature of biological neurons: their ability to carry out robust and reliable computation by adapting their input responses and spiking patterns to context through neuromodulation. Achieving analogous levels of robustness and adaptation in neuromorphic circuits through modulatory mechanisms is a largely unexplored path. We present a novel current-mode neuron design that supports robust neuromodulation with minimal model complexity, compatible with standard CMOS technologies. We first introduce a mathematical model of the circuit and provide tools to analyze and tune the neuron behavior; we then demonstrate both theoretically and experimentally the biologically plausible neuromodulation adaptation capabilities of the circuit over a wide range of parameters. All theoretical predictions were verified in experiments on a low-power 180 nm CMOS implementation of the proposed neuron circuit. Due to the analog underlying feedback structure, the proposed adaptive neuromodulable neuron exhibits a high degree of robustness, flexibility, and scalability across operating ranges of currents and temperatures, making it a perfect candidate for real-world neuromorphic applications.