Performance of the spin qubit shuttling architecture for a surface code implementation
quant-ph
Submitted: 2025-03-13
Updated: 2026-09-17
Terminology
Sources
- Quantum algorithms: A survey of applications and end-to-end complexities
- Fault-Tolerant Quantum Computation With Constant Error Rate
- Quantum codes on a lattice with boundary
- Quantum error correction below the surface code threshold
- Mapping of valley-splitting by conveyor-mode spin-coherent electron shuttling
- High-fidelity single-spin shuttling in silicon
- Near-Term Spin-Qubit Architecture Design via Multipartite Maximally-Entangled States
- Digital-Controlled Method of Conveyor-Belt Spin Shuttling in Silicon for Large-Scale Quantum Computation
- Sparse Blossom: correcting a million errors per core second with minimum-weight matching
- Demonstration of two-dimensional connectivity for a scalable error-corrected ion-trap quantum processor architecture
- Coherent spin qubit shuttling through germanium quantum dots
- Scalable Parity Architecture With a Shuttling-Based Spin Qubit Processor
- Architecture for fast implementation of qLDPC codes with optimized Rydberg gates
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