RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level

arXiv:1901.05909 · cs.CR · Submitted 2019-01-17 · Read on arXiv

cs.CR

Submitted: 2019-01-17

Updated: 2019-01-17

Comments: 6 pages, 6 Figures, 37th IEEE VLSI Test Symposium (VTS'19), 2019

Journal ref: IEEE 37th VLSI Test Symposium (VTS), Monterey, CA, USA, 2019, pp. 1-6

DOI: 10.1109/VTS.2019.8758600

License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/

Terminology

Accuracy — 6× in this paper · explained in 1 episode
Hamming Distance — 5× in this paper · explained in 2 episodes
Trace — 3× in this paper · explained in 2 episodes
Benchmark — 2× in this paper · explained in 2 episodes
Kullback-Leibler (KL) Divergence — 2× in this paper · explained in 3 episodes
Look-up Table — 2× in this paper
AES Galois Field — 1× in this paper
Abstraction — 1× in this paper · explained in 1 episode
RTL Switching Activity Interchange Format — 1× in this paper
Robustness — 1× in this paper · explained in 5 episodes
Test Vector Leakage Assessment — 1× in this paper
Verification — 1× in this paper · explained in 2 episodes

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